5 8-bit destination ← low byte (16-bit source), 6 8-bit destination ← high byte (16-bit source), Low byte (16-bit source) -5 – Maxim Integrated MAXQ610 User Manual
Page 40: 3 .3 .6 8-bit destination, High byte (16-bit source) -5, 3 .3 .7 16-bit destination, Concatenation (8-bit source, 8-bit source) -5, Maxq610 user’s guide
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MAXQ610 User’s Guide
3.3.4 Moving Values Between Registers of Different Sizes
Before covering some transfer scenarios that might arise, a special register must be introduced that is used in many
of these cases . The 16-bit general register (GR) is expressly provided for performing byte singulation of 16-bit words .
The high and low bytes of GR are individually accessible in the GRH and GRL registers, respectively . A read-only GRS
register makes a byte-swapped version of GR accessible, and the GRXL register provides a sign-extended version of
GRL .
3.3.5 8-Bit Destination ← Low Byte (16-Bit Source)
The simplest transfer possibility would be loading an 8-bit register with the low byte of a 16-bit register . This transfer
does not require use of GR and requires a prefix only if the destination or source register are outside the single-cycle
write or read regions, 0 to 7h and 0 to 0Fh, respectively .
move OFFS, LC[0]
; copy the low byte of LC[0] to the OFFS
; register
move ULDR, @DP[1]
; copy the low byte @DP[1] to the ULDR register
move WDCN, LC[0]
; assembles to: move PFX[2], #00h
; move (WDCON-80h), LC[0]
3.3.6 8-Bit Destination ← High Byte (16-Bit Source)
If, however, we needed to load an 8-bit register with the high byte of a 16-bit source, it would be best to use the GR
register . Transferring the 16-bit source to the GR register adds a single cycle .
move GR, LC[0]
; move LC[0] to the GR register
move IC, GRH
; copy the high byte into the IC register
3.3.7 16-Bit Destination ← Concatenation (8-Bit Source, 8-Bit Source)
Two 8-bit source registers can be concatenated and stored into a 16-bit destination by using the prefix register to hold
the high-order byte for the concatenated transfer . An additional cycle could be required if either source byte register
index is greater than 0Fh or the 16-bit destination is greater than 07h .
move PFX[0], IC
; load high order source byte IC into PFX
move @++SP, AP
; store @DP[0] the concatenation of IC:AP
; 16-bit destination sub-index: dst=08h
; 8-bit source sub-indexes:
; high=10h, low=11h
move PFX[1], #00h
;
move PFX[3], hig
; PFX=00:high
move dst, low
; dst=high:low