Maxim Integrated MAXQ610 - Manual (Page 127)

9-2
MAXQ610 User’s Guide
SECTION 9: SERIAL I/O MODULE
The serial I/O module provides the MAXQ610 access to a universal synchronous/asynchronous receiver-transmitter
(USART) for serial communication with framing error detection .
9.1 USART Modes
The USART supports four basic modes of operation and is capable of both synchronous and asynchronous modes,
with different protocols and baud rates . In the synchronous mode, the microcontroller supplies the clock and commu-
nication takes place in a half-duplex manner, while the asynchronous mode supports full-duplex operation . The four
serial operating modes are shown in Table 9-1, followed by detailed descriptions of each mode .
The USART has a control register (SCON) and a transmit/receive buffer register (SBUF) . Transmit or receive buffer
access depends upon whether SBUF is used contextually as a source or destination . When SBUF is used as a source
(read operation), the receive buffer is accessed . When SBUF is used as a destination (write operation), the transmit
buffer is accessed . The USART receiver incorporates a holding buffer so that it can receive an incoming word before
software has read the previous one .
Note that there is no single register bit that explicitly enables the USART for transmission . This means that the port
pin(s) associated with USART transmission (i .e ., TXD and RXD for mode 0) is controlled by the PDn and POn port
control register bits when the USART is not actively transmitting a character .
9.1.1 USART Mode 0
This mode is used to communicate in synchronous, half-duplex format with devices that accept the MAXQ610 micro-
controller as a master . A functional diagram and basic timing of this mode is shown in Figure 9-1 . As can be seen,
there is one bidirectional data line (RXD) and one shift clock line (TXD) used for communication . Mode 0 requires that
the MAXQ610 microcontroller be the master since it generates the serial shift clock for data transfers that occur in
either direction .
The RXD signal is used for both transmission and reception . Data bits enter and exit LSB first . TXD provides the shift
clock . The baud rate is equal to the shift clock frequency . When not using power-management mode, the baud rate
in mode 0 is equivalent to the clock input divided by either 12 or 4, as selected by SM2 bit (SCON .5) for the USART .
The USART begins transmitting when any instruction writes to SBUF . The internal shift register then begins to shift data
out . The clock is activated and transfers data until the 8-bit value is complete . Data is presented just prior to the falling
edge of the shift clock (TXD) so that an external device can latch the data using the rising edge .
The USART begins to receive data when the REN bit in the SCON register (SCON .4) is set to 1 and the RI bit (SCON .0)
is set to 0 . This condition tells the USART that there is data to be shifted in . The shift clock (TXD) activates, and the
USART latches incoming data on the rising edge . The external device should therefore present data on the falling
edge . This process continues until 8 bits have been received . The RI bit automatically is set to 1 immediately following
the last rising edge of the shift clock on TXD . This causes reception to stop until the SBUF has been read and the RI
bit cleared . When RI is cleared, another byte can be shifted in .
Table 9-1. USART Mode Summary
*Use of any system clock-divide modes or power-management mode affects the baud clock.
MODE
SYNCHRONOUS/
ASYNCHRONOUS
BAUD CLOCK*
DATA
BITS
START/STOP
9TH BIT
FUNCTION
0 Synchronous 4 or 12 clocks 8 None None
1 Asynchronous Baud-clock generator 8 1 start, 1 stop None
2 Asynchronous 32 or 64 clocks 9 1 start, 1 stop 0, 1, parity
3 Asynchronous Baud-clock generator 9 1 start, 1 stop 0, 1, parity