4 in-circuit debug buffer register (icdb), 5 in-circuit debug data register (icdd), 6 in-circuit debug address register (icda) – Maxim Integrated MAXQ610 User Manual
Page 164: Maxq610 user’s guide
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MAXQ610 User’s Guide
12.4.4 In-Circuit Debug Buffer Register (ICDB)
This register serves as the parallel holding buffer for the debug shift register of the TAP . Data is read from or written to
ICDB for serial communication between the debug routines and the external host .
12.4.5 In-Circuit Debug Data Register (ICDD)
This register is used by the debug engine to store data/read count so that utility ROM code can view that information .
This register is also used by the debug engine as a data register for content matching when BP5 is used as a register
breakpoint . In this case, only data bits in this register with their corresponding mask bits in the ICDA register set are
compared with the updated destination data to determine if a break should be generated .
12.4.6 In-Circuit Debug Address Register (ICDA)
This register is used by the debug engine to addresses so that utility ROM code can view that information . This regis-
ter is also used by the debug engine as a mask register to mask out don’t care bits in the ICDD register when BP5 is
used as a register breakpoint . When a bit in this register is set to 1, the corresponding bit location in the ICDD register
is compared to the data being written to the destination register to determine if a break should be generated . When
a bit in this register is cleared, the corresponding bit in the ICDD register becomes a don’t care and is not compared
against the data being written . When all bits in this register are cleared, any updated data pattern causes a break when
the BP5 register matches the destination register address of the current instruction .
7
0
In-Circuit Debug Buffer Register (ICDB)
0
rw
0
rw
0
rw
0
rw
0
rw
0
rw
0
rw
0
rw
Power-On Reset and Test-Logic-Reset
Read (r), Write (w), or Special (s) access
15
0
In-Circuit Debug Data Register (ICDD)
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
Power-On Reset or Test-Logic-Reset
Read (r), Write (w), or Special (s) access
15
0
In-Circuit Debug Address Register (ICDA)
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
0
r
Power-On Reset or Test-Logic-Reset
Read (r), Write (w), or Special (s) access