Maxq610 user’s guide – Maxim Integrated MAXQ610 User Manual
Page 173

14-6
MAXQ610 User’s Guide
CMP src
Compare Accumulator
Description:
Compare for equality between the active accumulator and the least significant byte of the specified
src . The PFX[n] register may be used to supply the high byte of data for 8-bit sources .
Status Flags:
E
Operation:
Acc = src: E
← 1
Acc
≠ src: E ← 0
Encoding:
15
0
f111
1000
ssss
ssss
Example(s):
CMP #45h
; Acc = 0145h, E=0
CMP #145h
; PFX[0] register used
; MOVE PFX[0], #01h (smart-prefixing)
; CMP #45h E=1
CPL
Complement Acc
Description:
Performs a logical bitwise complement (one’s complement) on the active accumulator (Acc or
A[AP]) and returns the result to the active accumulator .
Status Flags:
S, Z
Operation:
Acc
← ~Acc
Encoding:
15
0
1000
1010
0001
1010
Example(s):
; Acc = 0FFFFh, S=1, Z=0
CPL
; Acc
← 0000h, S=0, Z=1
; Acc = 0990h, S=0, Z=0
CPL
; Acc
← F66Fh, S=1, Z=0
CPL C
Complement Carry Flag
Description:
Logically complements the Carry (C) Flag .
Status Flag:
C
Operation:
C
← ~C
Encoding:
15
0
1101
1010
0010
1010
Example(s):
; C = 0
CPL C
; C
← 1
{L/S}DJNZ LC[n], src
Decrement Counter, {Long/Short} Jump Not Zero
Description:
The DJNZ LC[n], src instruction performs a conditional branch based upon the associated Loop
Counter (LC[n]) register . The DJNZ LC[n], src instruction decrements the LC[n] loop counter
and branches to the address defined by src if the decremented counter has not reached 0000h .
Program branches can be relative or absolute depending upon the src specifier and may be quali-
fied by using the ‘L’ or ‘S’ prefixes as documented in the JUMP src opcode .
Status Flags:
None
Operation:
LC[n]
← LC[n] –1
LC[n]
≠ 0: IP ← IP + src (relative) –or— src (absolute)
LC[n] = 0: IP
← IP + 1