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3 data memory, 2 .3 .3 data memory -7, Maxq610 user’s guide – Maxim Integrated MAXQ610 User Manual

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2-7

MAXQ610 User’s Guide

Following each reset, the processor automatically starts execution at address 8000h in the utility ROM, allowing utility
ROM code to perform any necessary system support functions . Next, the SPE bit is examined to determine whether
system programming should commence or whether that code should be bypassed, instead forcing execution to vector
to the start of user program code . When the SPE bit is set to 1, the processor executes the prescribed bootstrap-loader
mode program that resides in utility ROM . The SPE bit defaults to 0 . To enter the bootstrap loader mode, the SPE bit
can be set to 1 during reset by the JTAG interface . When in-system programming is complete, the bootstrap loader
can clear the SPE bit and reset the device such that the in-system programming routine is subsequently bypassed .

2.3.3 Data Memory

On-chip SRAM data memory begins at address 0000h and is contiguous through 03FFh (2KB) in word mode . Data
memory is accessed by indirect register addressing through a data pointer (@DP), frame pointer (@BP[OFFS]), or
stack pointer (PUSH/POP) . The data pointer is used as one of the operands in a MOVE instruction . If the data pointer is
used as source, the CPU performs a load operation that reads data from the data memory location addressed by the
data pointer . If the data pointer is used as destination, the CPU executes a store operation that writes data to the data
memory location addressed by the data pointer . The data pointer itself can be directly accessed by the user software .
The MAXQ610 incorporates two 16-bit data pointers (DP[0] and DP[1]) to support data block transfers . All data point-
ers support indirect addressing mode and indirect addressing with autoincrement or autodecrement . Data pointers
DP[0] and DP[1] can be used as postincrement/decrement source pointers by a MOVE instruction or preincrement/
decrement destination pointers by a MOVE instruction . Using a data pointer indirectly with “++” automatically increases
the content of the active data pointer by 1 immediately following the execution of read data transfer (@DP[n]++) or
immediately preceding the execution of a write operation (@++DP[n]) . Using data pointer indirectly with “--” decreases
the content of the active data pointer by 1 immediately following the execution of read data transfer (@DP[n]--) or
immediately preceding the execution of a write operation (@--DP[n]) .
The frame pointer (BP[OFFS]) is formed by 16-bit unsigned addition of frame pointer base register (BP) and frame
pointer offset register (OFFS) . Frame pointer can be used as a postincrement/decrement source pointer by a MOVE
instruction or as a preincrement/decrement destination pointer . Using the frame pointer indirectly with “++” (@
BP[++OFFS] for a write or @BP[OFFS++] for a read) automatically increases the content of the frame pointer offset
by 1 immediately before or after the execution of data transfer depending upon whether it is used as a destination or
source pointer respectively . Using frame pointer indirectly with “--” (@BP[--OFFS] for a write or @BP[OFFS--] for a read)
decreases the content of the frame pointer offset by 1 immediately before/after execution of data transfer depending
upon whether it is used as a destination or source pointer, respectively . Note that the increment/decrement function
affects the content of the OFFS register only, while the contents of the BP register remain unaffected by the borrow/
carryout from the OFFS register .
In addition, the MAXQ610 has a code pointer (CP) to support data block transfer from flash memory (or masked ROM
on a ROM-only part) . This allows the user to access the program flash memory as data, even when executing from the
flash . In addition, there are some restrictions on use of the code pointer due to memory access protection . See Section
2.6.3: Memory Access Protection Impact on Data Pointers (and Code Pointer)
for details . The code pointer, like the
normal data pointers, supports indirect addressing mode and indirect addressing with autoincrement or autodecre-
ment . The code pointer can be used as postincrement/decrement source pointer by MOVE instructions . Using the code
pointer indirectly with “++” automatically increases the content of the active code pointer by 1 immediately following the
execution of the read operation (e .g ., MOVE dst, @CP++) . Using code pointer indirectly with “--” decreases the content
of the active code pointer by 1 immediately following the execution of the read operation (e .g ., MOVE dst, @CP--) .
A normal data memory cycle using DP[0], DP[1], and FP to access SRAM takes only one system clock period to sup-
port fast internal execution . This allows read or write operations on SRAM to be completed in one clock cycle . To read
program memory as data using CP requires two system clocks . Data memory mapping and access control are handled
by the memory management unit (MMU) . Read/write access to the data memory can be in word or in byte .