Maxim Integrated MAXQ610 - Manual (Page 160)

12-9
MAXQ610 User’s Guide
12.3.2 Read Register Map Command Host-Utility ROM Interaction
A read register map command reads out data contents for all implemented system and peripheral registers . The host
does not specify a target register, but instead should expect register data output in successive order, starting with the
lowest order register in register module 0 . Data is loaded by the utility ROM to the 8-bit ICDB register and is output 1
byte per transfer cycle . Thus, for a 16-bit register, two transfer cycles are necessary . The host initiates each transfer
cycle to shift out the data bytes and finds valid data output tagged with a debug-valid (status = 11b) . At the end of
each transfer cycle, the debug engine clears the TXC flag to signal the utility ROM service routine that another byte
can be loaded to ICDB . The utility ROM service routine sets the TXC flag each time after loading data to the ICDB
register . This process is repeated until all registers have been read and output to the host . The host system recognizes
the completion of the register read when the status debug-idle is presented . This indicates that the debug engine is
ready for another operation .
Table 12-2. Debug Mode Commands (continued)
OP CODE COMMAND OPERATION
0010–0100 Write register
Write data to a selected register . This command requires four follow-on transfer cycles, two
for the register address and two for the data, starting with the LSB address and ending with
the MSB data . The address is moved to the ICDA register and the data is moved to the ICDD
register by the debug engine . This information is directly accessible by the utility ROM code .
At the completion of this command period, the debug engine updates the CMD[3:0] bits to
0100b and performs a jump to utility ROM code at 8010h . The utility ROM debug service rou-
tine updates the select register according to the information received in the ICDA and ICDD
registers .
0010–0101
Write data
memory
Write data to a selected data memory location . This command requires four follow-on transfer
cycles, two for the memory address and two for the data, starting with the LSB address and
ending with the MSB data . The address is moved to the ICDA register and the data is moved
to the ICDD register by the debug engine . This information is directly accessible by the util-
ity ROM code . At the completion of this command period, the debug engine updates the
CMD[3:0] bits to 0101b and performs a jump to utility ROM code at 8010h . The utility ROM
debug service routine updates the selected data memory location according to the information
received in the ICDA and ICDD registers .
0010–0110 Trace
Trace command . This command allows single stepping the CPU and requires no follow-on
transfer cycle . The trace operation is a ‘debug mode exit, one cycle CPU execution, debug
mode entry’ sequence .
0010–0111 Return
Return command . This command terminates the debug mode and returns the debug engine
to background mode . This allows the CPU to resume its normal operation at the point where it
has been last interrupted .
0010–1000
Unlock
password
Unlock the password lock . This command requires 32 follow-on transfer cycles each contain-
ing a byte value to be compared with the program memory password for the purpose of clear-
ing the PWL/PWLL/PWLS bits and granting access to protected debug and loader functions .
When this command is received, the debug engine updates the CMD[3:0] bit to 1000b and
performs a jump to utility ROM code at 8010h . Data is loaded to the ICDB register when each
byte of data is received, beginning with the LSB of the least significant word first and end with
the MSB of the most significant word .
0010–1001 Read register
Read from a selected internal register . This command requires two follow-on transfer cycles,
starting with the LSB address and ending with the MSB address . The address is moved to
ICDA register by the debug engine . This information is directly accessible by the utility ROM
code . At the completion of this command period, the debug engine updates the CMD[3:0] bits
to 1001b and performs a jump to utility ROM code at 8010h . The utility ROM debug service
routine always assumes a 16-bit register length and returns the requested data LSB first .