AMETEK Lx Series II Programming Manual - Manual (Page 105)

Programming Manual Lx \ Ls Series II
101
Query Syntax STATus:QUEStionable[:EVENt]?
Parameters None
Returned Parameters (Register Value)
Examples STAT:QUES:EVEN?
Related Commands *CLS STAT:QUES:NTR STAT:QUES:PTR
STATus:QUEStionable:CONDition?
This query returns the value of the Questionable Condition register. That is a read-only register,
which holds the real-time (unlatched) questionable status of the AC source.
Query Syntax STATus:QUEStionable:CONDition?
Example STAT:QUES:COND?
Returned Parameters (Register value)
STATus:QUEStionable:ENABle
This command sets or reads the value of the Questionable Enable register. This register is a
mask for enabling specific bits from the Questionable Event register to set the questionable
summary (QUES) bit of the Status Byte register. This bit (bit 3) is the logical OR of all the
Questionable Event register bits that are enabled by the Questionable Status Enable register.
Command Syntax STATus:QUEStionable:ENABle
Parameters 0 to 32727
Default Value 0
Examples STAT:QUES:ENAB 18
Query Syntax STATus:QUEStionable:ENABle?
Returned Parameters (Register value)
Related Commands STAT:QUES:EVEN?
STATus:QUEStionable:NTR
STATus:QUEStionable:PTR
These commands allow the values of the Questionable NTR (Negative-Transition) and PTR
(Positive-Transition) registers to be set or read. These registers serve as polarity filters between
the Questionable Enable and Questionable Event registers to cause the following actions:
When a bit of the Questionable NTR register is set to 1, then a 1-to-0 transition of the
corresponding bit of the Questionable Condition register causes that bit in the Questionable
Event register to be set.
When a bit of the Questionable PTR register is set to 1, then a 0-to-1 transition of the
corresponding bit in the Questionable Condition register causes that bit in the Questionable
Event register to be set.
If the same bits in both NTR and PTR registers are set to 1, then any transition of that bit at
the Questionable Condition register sets the corresponding bit in the Questionable Event
register.
If the same bits in both NTR and PTR registers are set to 0, then no transition of that bit at the
Questionable Condition register can set the corresponding bit in the Questionable Event
register.
Note: Setting a bit in the PTR or NTR filter can of itself generate positive or negative events in
the corresponding Questionable Event register.