Avago Technologies LSI53C1030 - Manual (Page 95)

PCI Configuration Space Register Description 4-9
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
Register: 0x0F
Reserved
Reserved [7:0]
This register is reserved.
Register: 0x10–0x13
I/O Base Address
Read/Write
The I/O Base Address register maps the operating register set into I/O
Space. The LSI53C1030 requires 256 bytes of I/O Space for this base
address register. Hardware sets bit 0 to 0b1. Bit 1 is reserved and
returns 0b0 on all reads.
I/O Base Address [31:2]
This field contains the I/O Base address.
Reserved [1:0]
This field is reserved.
Register: 0x14–0x17
Memory [0] Low
Read/Write
The Memory [0] Low register and the Memory [0] High register map
SCSI operating registers into Memory Space [0]. This register contains
the lower 32 bits of the Memory Space [0] base address. Hardware
programs bits [9:0] to 0b0000000100, which indicates that the Memory
7 0
Reserved
0 0 0 0 0 0 0 0
31 2 1 0
I/O Base Address
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
31 0
Memory [0] Low
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0