Avago Technologies LSI53C1030 - Manual (Page 107)

PCI Configuration Space Register Description 4-21
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
Register: 0xXX
MSI Next Pointer
Read Only
MSI Next Pointer [7:0]
This register points to the next item in the PCI function’s
extended capabilities list. The value of this register varies
according to system configuration.
Register: 0xXX
Message Control
Read/Write
Reserved [15:8]
This field is reserved.
64-bit Address Capable 7
The PCI function sets this read only bit to indicate sup-
port of a 64-bit message address.
Multiple Message Enable [6:4]
These read/write bits indicate the number of messages
that the host allocates to the LSI53C1030. The host sys-
tem software allocates all or a subset of the requested
messages by writing to this field. The number of allocated
request messages must align to a power of two.
Table 4.3
provides the bit encoding of this field.
7 0
MSI Next Pointer
X X X X X X X X
15 8 7 6 4 3 1 0
Message Control
0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0