Avago Technologies LSI53C1030 - Manual (Page 110)

4-24 PCI Host Register Description
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
Register: 0xXX
PCI-X Capability ID
Read Only
PCI-X Capability ID [7:0]
This register indicates the type of the current data struc-
ture. This register returns 0x07, indicating the PCI-X Data
Structure.
Register: 0xXX
PCI-X Next Pointer
Read Only
PCI-X Next Capabilities Pointer [7:0]
This register points to the next item in the device’s capa-
bilities list. The value of this register varies according to
system configuration.
Register: 0xXX
PCI-X Command
Read/Write
Reserved [15:7]
This field is reserved.
Maximum Outstanding Split Transactions [6:4]
These bits indicate the maximum number of split transac-
tions the LSI53C1030 can have outstanding at one time.
The LSI53C1030 uses the most recent value of this reg-
ister each time it prepares a new sequence. Note that if
7 0
PCI-X Capability ID
0 0 0 0 0 1 1 1
7 0
PCI-X Next Pointer
X X X X X X X X
15 7 6 4 3 2 1 0
PCI-X Command
0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0