Avago Technologies LSI53C1030 - Manual (Page 158)

IX-4 Index
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
FIFO
DMA 2-4
reply 4-37
reply free 2-7
reply post 2-7 , 4-35
request 4-37
request post 2-7
filter delay 5-8
filtering 5-9
flash ROM 1-3 , 2-5 , 2-24 , 3-15 , 3-23
address space 2-24
bad signature bit 4-32
block diagram 2-25
configurations 2-25
interface 2-24 , 3-14
signature recognition 2-25 , 2-26
size 3-22 , 3-24
flexibility 1-12
FLSHALE[1:0]/ 2-25 , 3-15 , 5-6
FLSHCE/ 2-25 , 3-15 , 5-6
FRAME/ 3-6 , 5-5
frames
reply message 2-7 , 2-15
request message 2-7 , 2-15
free running timer 2-5
frequency synthesizer 3-18 , 3-20 , 3-25
function number bit 4-28
Fusion-MPT 1-3 , 1-5 , 1-10 , 1-11 , 1-12 , 2-1 , 2-3 , 2-4 ,
2-6 , 2-26 , 3-15 , 4-28
G
general description 1-1
GNT/ 2-15 , 2-28 , 3-7 , 5-6
GPIO[7:0] 2-5 , 3-19 , 3-25 , 5-5
grant 2-15
ground signals 3-20
H
HB_LED/ 2-5 , 3-19 , 5-6
header type register 4-8
host diagnostic register 4-31 , 4-34
host doorbell value 4-30
host interface module 2-2 , 2-3 , 2-5
host interrupt mask register 2-16 , 3-8 , 3-9 , 4-35 , 4-36
host interrupt status register 4-35 , 4-36
host system 2-6
hot plug 5-7
HVD 2-23 , 3-10 , 3-11 , 3-13
sense voltage 5-4
hysteresis 5-7
I
I/O
base address 4-5
base address register 2-4 , 2-9 , 4-9
key 4-31 , 4-34
processor 2-4 , 2-28
read command 2-10 , 2-11 , 2-13
space 2-9 , 4-1 , 4-28
supply voltage 5-2
write command 2-10 , 2-11 , 2-13
I/O supply current 5-2
ICE 3-17
ID control 3-21 , 3-22 , 3-23 , 4-13
IDC socket 2-30
IDD-Core 5-2
IDD-I/O 5-2
IDDTN 3-18 , 3-25 , 5-6
IDSEL 2-8 , 2-28 , 3-6 , 3-16 , 5-6
IM 1-4 , 1-13 , 2-5 , 2-24 , 2-26
in-circuit emulator 3-17
information unit 2-18 , 2-21
input
capacitance 5-4
filtering 5-9
reset 5-10
signals 5-6
voltage 5-2
INTA/ 2-15 , 3-8 , 4-22 , 4-32 , 4-36 , 5-6
INTB/ 2-15 , 3-8 , 4-22 , 4-36 , 5-6
Integrated Mirroring 1-4 , 1-13 , 2-5 , 2-24 , 2-26
Integrated Striping 1-4
integration 1-12
interface
EEPROM 2-27
external memory 2-24
flash ROM 2-24 , 3-14 , 3-15
ICE 3-17
JTAG 3-17
memory 3-14
NVSRAM 3-14 , 3-15
PCI bus 3-4
SCSI channel [0] 3-10
SCSI channel [1] 3-13
serial EEPROM 2-6 , 2-27 , 3-16
test 3-17
interrupt 2-16
acknowledge command 2-10 , 2-13
ALT_INTA/ 2-15
ALT_INTB/ 2-15
coalescing 1-11
doorbell mask bit 4-37
INTA/ 2-15