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Avago Technologies LSI53C1030 User Manual

Page 83

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Power-On Sense Pins Description

3-23

Version 2.2

Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

MAD[10], ID Control [0] – By default, internal logic pulls this pin
LOW. Pulling this signal LOW either allows the serial EEPROM to
program bit 15 of the PCI Function [0]

Subsystem ID

register or

allows this bit to default to 0b0. Pulling this pin HIGH sets this bit to
0b1.

MAD[9:8], Reserved.

MAD[7], Serial EEPROM Download Enable – By default, internal
logic pulls this pin LOW to enable the download of PCI configuration
information from the serial EEPROM. Pulling this pin HIGH disables
the download of the PCI configuration information from the serial
EEPROM. Disabling the download of PCI configuration information
defaults the

Subsystem Vendor ID

register to 0x1000 and defaults

Subsystem ID

register for the respective PCI Function to either

0x1000 if MAD[11:10] are pulled LOW or to 0x8000 if MAD[11:10]
are pulled HIGH.

MAD[6], IOP Boot Enable – By default, internal logic pulls this pin
LOW. In the default mode, the IOP starts the boot process and
downloads firmware from the Flash ROM. Pulling this pin HIGH
causes the IOP to await a firmware download from the host system.

MAD[5:4], PCI Single/Multifunction and SCSI Single/Dual
Channel Configuration
– These pins work in conjunction with each
other to configure the LSI53C1030 as a single function PCI-X to
single channel SCSI controller or a multifunction PCI-X to dual
channel SCSI controller. By default, hardware internally pulls
MAD[5:4] down to configure the LSI53C1030 as multifunction PCI-X
to dual channel SCSI controller. The user may pull MAD[5:4] HIGH
to configure the LSI53C1030 as a single function PCI-X to single
channel SCSI controller. This configuration enables PCI Function [0]
and SCSI Channel [0], disables PCI Function [1] and SCSI
Channel [1], and programs the PCI Function [0]

Header Type

register

to indicate a single function PCI device. LSI Logic does not support
multifunction PCI-X to single channel SCSI or single function PCI-X
to dual channel SCSI configurations.

Table 3.21

provides the

MAD[5:4] pin encoding definitions.