Avago Technologies LSI53C1030 - Manual (Page 41)

PCI Functional Description 2-11
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
2.3.2.2 Special Cycle Command
The LSI53C1030 ignores this command as a slave and never generates
it as a master.
2.3.2.3 I/O Read Command
The I/O Read command reads data from an agent mapped in the I/O
address space. When decoding I/O commands, the LSI53C1030
decodes the lower 32 address bits and ignores the upper 32 address
bits. The LSI53C1030 supports this command when operating in either
the PCI or PCI-X bus mode.
2.3.2.4 I/O Write Command
The I/O Write command writes data to an agent mapped in the I/O
address space. When decoding I/O commands, the LSI53C1030
decodes the lower 32 address bits and ignores the upper 32 address
bits. The LSI53C1030 supports this command when operating in either
the PCI or PCI-X bus mode.
2.3.2.5 Memory Read Command
The LSI53C1030 uses the Memory Read command to read data from an
agent mapped in the memory address space. The target can perform an
anticipatory read if such a read produces no side effects. The LSI53C1030
supports this command when operating in the PCI bus mode.
2.3.2.6 Memory Read Dword Command
The Memory Read Dword command reads up to a single Dword of data
from an agent mapped in the memory address space and can only be
initiated as a 32-bit transaction. The target can perform an anticipatory
read if such a read produces no side effects. The LSI53C1030 supports
this command when operating in the PCI-X bus mode.
2.3.2.7 Memory Write Command
The Memory Write command writes data to an agent mapped in the
memory address space. The target assumes responsibility for data
coherency when it returns “ready.” The LSI53C1030 supports this
command when operating in either the PCI or PCI-X bus mode.