Avago Technologies LSI53C1030 - Manual (Page 155)

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller IX-1
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
Index
Numerics
12 mA output signals 5-6
133 MHz 1-11
133 MHz capable bit 4-27
133 MHz PCI-X 1-3 , 3-21 , 3-22 , 5-9
133 MHz PCI-X bit 4-27
33 MHz PCI 5-9
64-bit address capable bit 4-21
64-bit device bit 4-27
64-bit enable bit 3-22
64-bit PCI 1-3 , 1-11 , 3-21 , 3-22
66 MHz capable bit 3-22 , 4-6
66 MHz PCI 3-21 , 3-22 , 5-9
66 MHz PCI-X 5-9
8 mA output signals 5-6
A
A_DIFFSENS 2-23 , 3-11 , 5-4
A_LED/ 2-5 , 3-19 , 5-6
A_RBIAS 3-11
A_SACK+- 3-12
A_SATN+- 3-12
A_SBSY+- 3-12
A_SCD+- 3-12
A_SD[15:0]+- 3-10
A_SDP[1:0]+- 3-10
A_SIO+- 3-12
A_SMSG+- 3-12
A_SREQ+- 3-12
A_SRST+- 3-12
A_SSEL+- 3-12
A_VDDBIAS 3-11
absolute maximum stress ratings 5-2
AC characteristics 5-9
ACK64/ 3-6 , 5-5
active LOW 3-1
active termination 2-23
AD[31:0] 5-5
AD[63:0] 3-5 , 5-5
address
diagnostic read/write 4-34
latches 3-15
address reply 2-7
address/data bus 3-21 , 4-27
ADSC/ 3-14 , 5-6
ADV/ 3-14 , 5-6
air temperature 5-2
alias to memory read block 2-10 , 2-12 , 2-13
alias to memory write block 2-10 , 2-12
alignment 2-14
ALT_INTA/ 2-15 , 3-8 , 3-9 , 4-22 , 4-36 , 5-6
ALT_INTB/ 2-15 , 3-8 , 3-9 , 4-22 , 4-36 , 5-6
analog voltage 5-2
arbitration 2-15
ARM Multi-ICE 1-13
ARM966E-S 1-3 , 1-10 , 2-4 , 2-6 , 3-10 , 4-32
aux_current bit 4-18
B
B_DIFFSENS 2-23 , 3-13 , 5-4
B_LED/ 2-5 , 3-19 , 5-6
B_RBIAS 3-13
B_SACK+- 3-14
B_SATN+- 3-14
B_SBSY+- 3-14
B_SCD+- 3-14
B_SD[15:0]+- 3-13
B_SDP[1:0]+- 3-13
B_SIO+- 3-14
B_SMSG+- 3-14
B_SREQ+- 3-14
B_SRST+- 3-14
B_SSEL+- 3-14
B_VDDBIAS 3-13
ball grid array 5-18 , 5-20
base address register
I/O 2-4 , 4-9
memory [0] 4-9
memory [1] 4-10
BGA top view 5-20
bidirectional signals 5-5