Avago Technologies LSI53C1030 - Manual (Page 111)

PCI Configuration Space Register Description 4-25
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
the LSI53C1030 prepares a sequence before the setting
of this field changes, the PCI function initiates the pre-
pared sequence with the previous setting.
Table 4.4 pro-
vides the bit encodings for this field.
Maximum Memory Read Byte Count [3:2]
These bits indicate the maximum byte count the
LSI53C1030 uses when initiating a sequence with one of
the burst memory read commands.
Table 4.5 provides
the bit encodings for this field.
Reserved 1
This bit is reserved.
Table 4.4 Maximum Outstanding Split Transactions
Bits [6:4]
Encoding
Maximum Outstanding
Split Transactions
0b000 1
0b001 2
0b010 3
0b011 4
0b100 8
0b101 Reserved
0b110 Reserved
0b111 Reserved
Table 4.5 Maximum Memory Read Count
Bits [3:2]
Encoding
Maximum Memory Read
Byte Count
0b00 512
0b01 1024
0b10 2048
0b11 Reserved