Avago Technologies LSI53C1030 - Manual (Page 147)

Package Drawings 5-23
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
Table 5.20 LSI53C1030 Signal List by Signal Name (Cont.)
VSS_IO R15
VSS_IO R16
VSS_IO T11
VSS_IO T12
VSS_IO T13
VSS_IO T14
VSS_IO T15
VSS_IO T16
VSS_IO T24
VSS_IO U1
VSS_IO V26
VSS_IO W3
VSS_IO Y24
VSS_IO AA1
VSS_IO AB26
VSS_IO AC3
VSS_IO AD7
VSS_IO AD11
VSS_IO AD15
VSS_IO AD19
VSS_IO AD23
VSS_IO AE1
VSS_IO AF2
VSS_IO AF6
VSS_IO AF10
VSS_IO AF14
VSS_IO AF18
VSS_IO AF22
VSS_IO AF26
VSSA H5
VSSA AD24
VSSC G4
VSSC P2
VSSC AB5
VSSC AB7
VSSC AB8
VSSC AD14
VSSC AB23
VSSC AB24
VSSC L22
VSSC F25
VSSC C26
VSSC C21
VSSC C14
VSSC B4
ZCR_EN/ N23
Signal Ball Signal Ball
MAD5 H22
MAD6 E25
MAD7 D26
MAD8 E23
MAD9 F22
MAD10 C24
MAD11 E22
MAD12 D23
MAD13 B25
MAD14 E21
MAD15 D22
MADP0 B24
MADP1 C22
MCLK E20
MOE/ G26
NC AC9
PAR AF19
PAR64 AA24
PCI5VBIAS AD9
PCI5VBIAS
AE6
PCI5VBIAS AC10
PCI5VBIAS AF12
PCI5VBIAS AD18
PCI5VBIAS AB22
PCI5VBIAS
Y22
PCI5VBIAS W25
PCI5VBIAS M23
PERR/
AE17
PIPESTAT0 D5
PIPESTAT1 E6
PIPESTAT2 C3
PVT1 AE5
PVT2 AF4
RAMCE/ D20
REQ/ AD10
REQ64/ AD22
RST/ AB10
RTCK_ICE AA5
SCANEN N22
SCANMODE E7
SCLK F3
SerialCLK J25
SerialDATA H26
SERR/ AC17
STOP/ AB16
TCK_CHIP AC6
TCK_ICE AA4
TDI_CHIP AF3
TDI_ICE AB3
TDO_CHIP AD6
TDO_ICE AD2
TESTCLKEN D7
TESTACLK
AB6
TESTHCLK AE2
TMS_CHIP
AE4
TMS_ICE Y5
TN C5
TRACECLK B3
TRACEPKT0 D4
TRACEPKT1 B2
TRACEPKT2
F5
TRACEPKT3 E4
TRACEPKT4 C2
TRACEPKT5 E3
TRACEPKT6 G5
TRACEPKT7
F4
TRACESYNC E5
TRDY/ AE16
TRST_ICE/ AB4
TST_RST/ AD5
VDD_IO A1
VDD_IO A2
VDD_IO A6
VDD_IO A10
VDD_IO A14
VDD_IO A18
VDD_IO A22
VDD_IO A26
VDD_IO C7
VDD_IO C11
VDD_IO C15
VDD_IO C19
VDD_IO C23
VDD_IO D3
VDD_IO E26
VDD_IO F1
VDD_IO G24
VDD_IO H3
VDD_IO J26
VDD_IO K1
VDD_IO L24
VDD_IO M3
VDD_IO N26
VDD_IO P1
VDD_IO R24
VDD_IO T3
VDD_IO U26
VDD_IO V1
VDD_IO W24
VDD_IO Y3
VDD_IO AA26
VDD_IO AB1
VDD_IO AC24
VDD_IO AD4
VDD_IO AD8
VDD_IO AD12
VDD_IO AD16
VDD_IO AD20
VDD_IO AE26
VDD_IO AF1
VDD_IO AF5
VDD_IO AF9
VDD_IO AF13
VDD_IO AF17
VDD_IO AF21
VDD_IO AF25
VDDA C1
VDDA AB21
VDDC D2
VDDC N2
VDDC AD3
VDDC AE3
VDDC AC7
VDDC AF15
VDDC AE24
VDDC AD25
VDDC M22
VDDC J22
VDDC E19
VDDC D15
VDDC D6
VSS_IO A5
VSS_IO A9
VSS_IO A13
VSS_IO A17
VSS_IO A21
VSS_IO A25
VSS_IO B1
VSS_IO B26
VSS_IO C4
VSS_IO C8
VSS_IO C12
VSS_IO C16
VSS_IO C20
VSS_IO D24
VSS_IO E1
VSS_IO F26
VSS_IO G3
VSS_IO H24
VSS_IO J1
VSS_IO K26
VSS_IO L3
VSS_IO L11
VSS_IO L12
VSS_IO L13
VSS_IO L14
VSS_IO L15
VSS_IO L16
VSS_IO M11
VSS_IO M12
VSS_IO M13
VSS_IO M14
VSS_IO M15
VSS_IO M16
VSS_IO M24
VSS_IO N1
VSS_IO N11
VSS_IO N12
VSS_IO N13
VSS_IO N14
VSS_IO N15
VSS_IO N16
VSS_IO P11
VSS_IO P12
VSS_IO P13
VSS_IO P14
VSS_IO P15
VSS_IO P16
VSS_IO P26
VSS_IO R3
VSS_IO R11
VSS_IO R12
VSS_IO R13
VSS_IO R14
Signal Ball Signal Ball Signal Ball