Intel IA-32 - Manual (Page 575)

Vol. 3A 15-25
8086 EMULATION
Redirecting software interrupts back to the 8086 program potentially speeds up interrupt
handling because a switch back and forth between virtual-8086 mode and protected mode is not
required. This latter interrupt-handling technique is particularly useful for 8086 operating
systems (such as MS-DOS) that use the INT n instruction to call operating system procedures.
The CPUID instruction can be used to verify that the virtual mode extension is implemented on
the processor. Bit 1 of the feature flags register (EDX) indicates the availability of the virtual
mode extension (see “CPUID—CPU Identification” in Chapter 3, “Instruction Set Reference,
A-M”, of the IA-32 Intel® Architecture Software Developer’s Manual, Volume 2A).
The following sections describe the six methods (or mechanisms) for handling software inter-
rupts in virtual-8086 mode. See Section 15.3.2, “Class 2—Maskable Hardware Interrupt
Handling in Virtual-8086 Mode Using the Virtual Interrupt Mechanism”, for a description of the
use of the VIF and VIP flags in the EFLAGS register for handling maskable hardware interrupts.
15.3.3.1 Method 1: Software Interrupt Handling
When the VME flag in control register CR4 is clear and the IOPL field is 3, a Pentium or later
IA-32 processor handles software interrupts in the same manner as they are handled by an
Intel386 or Intel486 processor. It executes an implicit call to the interrupt handler in the
protected-mode IDT pointed to by the interrupt vector. See Section 15.3.1, “Class 1—Hardware
Interrupt and Exception Handling in Virtual-8086 Mode”, for a complete description of this
mechanism and its possible uses.
Figure 15-5. Software Interrupt Redirection Bit Map in TSS
I/O Map Base
Task-State Segment (TSS)
64H
31 24 23 0
1 1 1 1 1 1 1 1
I/O Permission Bit Map
0
I/O map base
must not exceed
DFFFH.
Last byte of bit
map must be
followed by a
byte with all bits
Software Interrupt Redirection Bit Map (32 Bytes)