Intel IA-32 - Manual (Page 540)

14-14 Vol. 3A
MACHINE-CHECK ARCHITECTURE
14.6.2 Compound Error Codes
Compound error codes describe errors related to the TLBs, memory, caches, bus and intercon-
nect logic, and internal timer. A set of sub-fields is common to all of compound errors. These
sub-fields describe the type of access, level in the memory hierarchy, and type of request.
Table 14-5 shows the general form of the compound error codes. The interpretation column
indicates the name of a compound error. The name is constructed by substituting mnemonics
from Tables 14-5 through 14-8 for the sub-field names given within curly braces.
Table 14-3. IA32_MCi_Status [15:0] Simple Error Code Encoding
Error Code Binary Encoding Meaning
No Error 0000 0000 0000 0000 No error has been reported to this bank of
error-reporting registers.
Unclassified 0000 0000 0000 0001 This error has not been classified into the
MCA error classes.
Microcode ROM Parity
Error 0000 0000 0000 0010 Parity error in internal microcode ROM
External Error 0000 0000 0000 0011 The BINIT# from another processor caused
this processor to enter machine check.
1
FRC Error 0000 0000 0000 0100 FRC (functional redundancy check)
master/slave error
Internal Unclassified 0000 01xx xxxx xxxx Internal unclassified errors
2
NOTES:
1. BINIT# assertion will cause a machine check exception if the processor (or any processor on the same
external bus) has BINIT# observation enabled during power-on configuration (hardware strapping) and
if machine check exceptions are enabled (by setting CR4.MCE = 1).
2. Internal unclassified errors have not been classified. This is because no additional information is
included in the machine check register.