Intel IA-32 - Manual (Page 316)

7-48 Vol. 3A
MULTIPLE-PROCESSOR MANAGEMENT
Power management related events (such as Thermal Monitor 2 or chipset driven STPCLK#
assertion) will not cause the monitor event pending flag to be cleared. Faults will not cause the
monitor event pending flag to be cleared.
Software should not allow for voluntary context switches in between MONITOR/MWAIT in the
instruction flow. Note that execution of MWAIT does not re-arm the monitor hardware. This
means that MONITOR/MWAIT need to be executed in a loop. Also note that exits from the
MWAIT state could be due to a condition other than a write to the triggering address; software
should explicitly check the triggering data location to determine if the write occurred. Software
should also check the value of the triggering address following the execution of the monitor
instruction (and prior to the execution of the MWAIT instruction). This check is to identify any
writes to the triggering address that occurred during the course of MONITOR execution.
The address range provided to the MONITOR instruction must be of write-back caching type.
Only write-back memory type stores to the monitored address range will trigger the monitor
hardware. If the address range is not in memory of write-back type, the address monitor hard-
ware may not be set up properly or the monitor hardware may not be armed. Software is also
responsible for ensuring that
•
Writes that are not intended to cause the exit of a busy loop do not write to a location
within the address region being monitored by the monitor hardware,
•
Writes intended to cause the exit of a busy loop are written to locations within the
monitored address region.
Not doing so will lead to more false wakeups (an exit from the MWAIT state not due to a write
to the intended data location). These have negative performance implications. It might be neces-
sary for software to use padding to prevent false wakeups. CPUID provides a mechanism for
determining the size data locations for monitoring as well as a mechanism for determining the
size of a the pad.
7.11.5 Monitor/Mwait Address Range Determination
To use the MONITOR/MWAIT instructions, software should know the length of the region
monitored by the MONITOR/MWAIT instructions and the size of the coherence line size for
cache-snoop traffic in a multiprocessor system. This information can be queried using the
CPUID monitor leaf function (EAX = 05H). You will need the smallest and largest monitor line
size:
•
To avoid missed wake-ups: make sure that the data structure used to monitor writes fits
within the smallest monitor line-size. Otherwise, the processor may not wake up after a
write intended to trigger an exit from MWAIT.
•
To avoid false wake-ups; use the largest monitor line size to pad the data structure used to
monitor writes. Software must make sure that beyond the data structure, no unrelated data
variable exists in the triggering area for MWAIT. A pad may be needed to avoid this
situation.