3 instruction operands – Intel IA-32 User Manual
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1.3.3
Instruction Operands
When instructions are represented symbolically, a subset of the IA-32 assembly language is
used. In this subset, an instruction has the following format:
label: mnemonic argument1, argument2, argument3
where:
•
A label is an identifier which is followed by a colon.
•
A mnemonic is a reserved name for a class of instruction opcodes which have the same
function.
•
The operands argument1, argument2, and argument3 are optional. There may be from
zero to three operands, depending on the opcode. When present, they take the form of
either literals or identifiers for data items. Operand identifiers are either reserved names of
registers or are assumed to be assigned to data items declared in another part of the
program (which may not be shown in the example).
When two operands are present in an arithmetic or logical instruction, the right operand is the
source and the left operand is the destination.
For example:
LOADREG: MOV EAX, SUBTOTAL
In this example LOADREG is a label, MOV is the mnemonic identifier of an opcode, EAX is
the destination operand, and SUBTOTAL is the source operand. Some assembly languages put
the source and destination in reverse order.
Figure 1-1. Bit and Byte Order
Byte 3
Highest
Data Structure
Byte 1
Byte 2
Byte 0
31
24 23
16 15
8 7
0
Address
Lowest
Bit offset
28
24
20
16
12
8
4
0
Address
Byte Offset