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Intel IA-32 User Manual

Page 403

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Vol. 3A 9-29

PROCESSOR MANAGEMENT AND INITIALIZATION

271

272 ;assume no LDT used in the initial task - if necessary,

273 ;code to move the LDT could be added, and should resemble

274 ;that used to move the TSS

275

276 ; load task register

277 LTR BX ; No task switch, only descriptor loading

278 ; See Figure 9-6

279 ; load minimal set of registers necessary to simulate task

280 ; switch

281

282

283 MOV AX,[EDX].SS_reg ; start loading registers

284 MOV EDI,[EDX].ESP_reg

285 MOV SS,AX

286 MOV ESP,EDI ; stack now valid

287 PUSH DWORD PTR [EDX].EFLAGS_reg

288 PUSH DWORD PTR [EDX].CS_reg

289 PUSH DWORD PTR [EDX].EIP_reg

290 MOV AX,[EDX].DS_reg

291 MOV BX,[EDX].ES_reg

292 MOV DS,AX ; DS and ES no longer linear memory

293 MOV ES,BX

294

295 ; simulate far jump to initial task

296 IRETD

297

298 STARTUP_CODE ENDS

*** WARNING #377 IN 298, (PASS 2) SEGMENT CONTAINS PRIVILEGED
INSTRUCTION(S)

299

300 END STARTUP, DS:STARTUP_DATA, SS:STARTUP_DATA

301

302

ASSEMBLY COMPLETE, 1 WARNING, NO ERRORS.