Intel IA-32 - Manual (Page 210)

5-34 Vol. 3A
INTERRUPT AND EXCEPTION HANDLING
The opcodes D6 and F1 are undefined opcodes that are reserved by the IA-32 architecture.
These opcodes, even though undefined, do not generate an invalid opcode exception.
The UD2 instruction is guaranteed to generate an invalid opcode exception.
Exception Error Code
None.
Saved Instruction Pointer
The saved contents of CS and EIP registers point to the instruction that generated the exception.
Program State Change
A program-state change does not accompany an invalid-opcode fault, because the invalid
instruction is not executed.