Intel IA-32 - Manual (Page 371)

Vol. 3A 8-47
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
d. 100B (NMI) — Deliver the signal to all the agents listed in the destination field. The
vector information is ignored. NMI is an edge triggered interrupt regardless of the
Trigger Mode Setting.
e. 101B (INIT) — Deliver this signal to all the agents listed in the destination field. The
vector information is ignored. INIT is an edge triggered interrupt regardless of the
Trigger Mode Setting.
f. 111B (ExtINT) — Deliver the signal to the INTR signal of all agents in the destination
field (as an interrupt that originated from an 8259A compatible interrupt controller).
The vector is supplied by the INTA cycle issued by the activation of the ExtINT.
ExtINT is an edge triggered interrupt.
3. Level — Edge triggered interrupt messages are always interpreted as assert messages. For
edge triggered interrupts this field is not used. For level triggered interrupts, this bit
reflects the state of the interrupt input.
4. Trigger Mode — This field indicates the signal type that will trigger a message.
a. 0 — Indicates edge sensitive.
b. 1 — Indicates level sensitive.