Intel IA-32 - Manual (Page 513)

Vol. 3A 13-3
POWER AND THERMAL MANAGEMENT
If P-states are exposed by the BIOS as hardware coordinated, software is expected to confirm
processor support for P-state hardware coordination feedback and use the feedback mechanism
to make P-state decisions. The OSPM is expected to reset the MSRs (execute WRMSR with 0
to these MSRs individually) at the start of the time window used for making the P-state decision.
Example 13-1 demonstrates steps for using the hardware feedback mechanism provided by
IA32_APERF MSR and IA32_MPERF MSR to determine a target P-state.
Example 13-1 Determine Target P-state From Hardware Coordinated Feedback
DWORD PercentBusy; // Percentage of processor time not idle.
// Measure “PercentBusy“ during previous sampling window.
// Typically, “PercentBusy“ is measure over a time scale suitable for
// power management decisions
//
// RDMSR of MCNT and ACNT should be performed without delay.
// Software needs to exercise care to avoid delays between
// the two RDMSRs (for example, interrupts).
MCNT = RDMSR(IA32_MPERF);
ACNT = RDMSR(IA32_APERF);
// PercentPerformance indicates the percentage of the processor
// that is in use. The calculation is based on the PercentBusy,
// that is the percentage of processor time not idle and the P-state
// hardware coordinated feedback using the ACNT/MCNT ratio.
// Note that both values need to be calculated over the same
// time window.
If (PercentBusy == 100) {
PercentPerformance = 100;
} else {
PercentPerformance = PercentBusy * (ACNT/MCNT);
}
// This example does not cover the additional logic or algorithms
// necessary to coordinate multiple logical processors to a target P-state.
TargetPstate = FindPstate(PercentPerformance);
if (TargetPstate != currentPstate) {
SetPState(TargetPstate);
}
WRMSR(IA32_MPERF, 0);
WRMSR(IA32_APERF, 0);