Intel IA-32 - Manual (Page 223)

Vol. 3A 5-47
INTERRUPT AND EXCEPTION HANDLING
Interrupt 13—General Protection Exception (#GP)
Exception Class Fault.
Description
Indicates that the processor detected one of a class of protection violations called “general-
protection violations.” The conditions that cause this exception to be generated comprise all the
protection violations that do not cause other exceptions to be generated (such as, invalid-TSS,
segment-not-present, stack-fault, or page-fault exceptions). The following conditions cause
general-protection exceptions to be generated:
•
Exceeding the segment limit when accessing the CS, DS, ES, FS, or GS segments.
•
Exceeding the segment limit when referencing a descriptor table (except during a task
switch or a stack switch).
•
Transferring execution to a segment that is not executable.
•
Writing to a code segment or a read-only data segment.
•
Reading from an execute-only code segment.
•
Loading the SS register with a segment selector for a read-only segment (unless the
selector comes from a TSS during a task switch, in which case an invalid-TSS exception
occurs).
•
Loading the SS, DS, ES, FS, or GS register with a segment selector for a system segment.
•
Loading the DS, ES, FS, or GS register with a segment selector for an execute-only code
segment.
•
Loading the SS register with the segment selector of an executable segment or a null
segment selector.
•
Loading the CS register with a segment selector for a data segment or a null segment
selector.
•
Accessing memory using the DS, ES, FS, or GS register when it contains a null segment
selector.
•
Switching to a busy task during a call or jump to a TSS.
•
Using a segment selector on a non-IRET task switch that points to a TSS descriptor in the
current LDT. TSS descriptors can only reside in the GDT. This condition causes a #TS
exception during an IRET task switch.
•
Violating any of the privilege rules described in Chapter 4, “Protection.”
•
Exceeding the instruction length limit of 15 bytes (this only can occur when redundant
prefixes are placed before an instruction).
•
Loading the CR0 register with a set PG flag (paging enabled) and a clear PE flag
(protection disabled).