Intel IA-32 - Manual (Page 350)

8-26 Vol. 3A
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
sors and to FFH for Pentium 4 and Intel Xeon pro-
cessors.
11: (All Excluding Self)
The IPI is sent to all processors in a system with
the exception of the processor sending the IPI. The
APIC broadcasts a message with the physical des-
tination mode and destination field set to 0xFH for
Pentium and P6 family processors and to 0xFFH
for Pentium 4 and Intel Xeon processors. Support
for this destination shorthand in conjunction with
the lowest-priority delivery mode is model specif-
ic. For Pentium 4 and Intel Xeon processors, when
this shorthand is used together with lowest priority
delivery mode, the IPI may be redirected back to
the issuing processor.
Destination Specifies the target processor or processors. This field is only used
when the destination shorthand field is set to 00B. If the destination
mode is set to physical, then bits 56 through 59 contain the APIC ID
of the target processor for Pentium and P6 family processors and bits
56 through 63 contain the APIC ID of the target processor the for
Pentium 4 and Intel Xeon processors. If the destination mode is set
to logical, the interpretation of the 8-bit destination field depends on
the settings of the DFR and LDR registers of the local APICs in all
the processors in the system (see Section 8.6.2, “Determining IPI
Destination”).
Not all combinations of options for the ICR are valid. Table 8-3 shows the valid combinations
for the fields in the ICR for the Pentium 4 and Intel Xeon processors; Table 8-4 shows the valid
combinations for the fields in the ICR for the P6 family processors. Also note that the lower half
of the ICR may not be preserved over transitions to the deepest C-States.
Table 8-3. Valid Combinations for the Pentium 4 and Intel Xeon Processors’
Local xAPIC Interrupt Command Register
Destination
Shorthand Valid/
Invalid Trigger
Mode
Delivery Mode Destination Mode
No Shorthand Valid Edge All Modes
1
Physical or Logical
No Shorthand Invalid 2 Level All Modes Physical or Logical
Self Valid Edge Fixed X 3
Self Invalid 2 Level Fixed X
Self Invalid X Lowest Priority, NMI, INIT, SMI, Start-Up X
All Including Self Valid Edge Fixed X
All Including Self Invalid 2 Level Fixed X
All Including Self Invalid X Lowest Priority, NMI, INIT, SMI, Start-Up X