Intel IA-32 - Manual (Page 231)

Vol. 3A 5-55
INTERRUPT AND EXCEPTION HANDLING
Interrupt 16—x87 FPU Floating-Point Error (#MF)
Exception Class Fault.
Description
Indicates that the x87 FPU has detected a floating-point error. The NE flag in the register CR0
must be set for an interrupt 16 (floating-point error exception) to be generated. (See Section 2.5,
“Control Registers,” for a detailed description of the NE flag.)
NOTE
SIMD floating-point exceptions (#XF) are signaled through interrupt 19.
While executing x87 FPU instructions, the x87 FPU detects and reports six types of floating-
point error conditions:
•
Invalid operation (#I)
— Stack overflow or underflow (#IS)
— Invalid arithmetic operation (#IA)
•
Divide-by-zero (#Z)
•
Denormalized operand (#D)
•
Numeric overflow (#O)
•
Numeric underflow (#U)
•
Inexact result (precision) (#P)
Each of these error conditions represents an x87 FPU exception type, and for each of exception
type, the x87 FPU provides a flag in the x87 FPU status register and a mask bit in the x87 FPU
control register. If the x87 FPU detects a floating-point error and the mask bit for the exception
type is set, the x87 FPU handles the exception automatically by generating a predefined (default)
response and continuing program execution. The default responses have been designed to
provide a reasonable result for most floating-point applications.
If the mask for the exception is clear and the NE flag in register CR0 is set, the x87 FPU does
the following:
1. Sets the necessary flag in the FPU status register.
2. Waits until the next “waiting” x87 FPU instruction or WAIT/FWAIT instruction is
encountered in the program’s instruction stream.
3. Generates an internal error signal that cause the processor to generate a floating-point
exception (#MF).