FUJITSU F2MC-8L F202RA - Manual (Page 343)

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CHAPTER 14 8-BIT SERIAL I/O
14.7 Operations of Serial Input Functions
In the 8-bit serial I/O, 8-bit serial input operation synchronized with a shift clock is
possible.
■ Serial Input Operation
Serial input operation is divided into serial input operation with an internal shift clock and serial input
operation with an external shift clock. When serial I/O operation is allowed, serial data is input in the SDR
and, at the same time, the contents of the SDR are output to the serial data output pin (SO).
●
Serial input operation using internal shift clock
Serial input operation with the internal shift clock requires the settings shown in Figure 14.7-1 .
Figure 14.7-1 Settings Required for Serial Input Operation using Internal Shift Clock
When serial input operation is started, the value of the serial data input pin (SI) is captured and held in the
SDR in synchronization with the rising edge of the selected internal shift clock. In this case, the SDR of the
transfer destination (serial output side) must already be set and the transfer destination must be in the
external shift clock input wait state.
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SMR SIOF SIOE SCKE SOE CKS1 CKS0 BDS SST
1 1
SDR
DDR3
0
SSEL SSEL
1
0
1
Other than 11
Reception data storage
: Used bit
: Unused bit
: Set "0"
: Set "1"