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FUJITSU F2MC-8L F202RA User Manual

Page 185

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169

CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER

Block Diagram for 8/16-bit Capture Timer/Counter Pins

Figure 8.3-1 Block Diagram for 8/16-bit Capture Timer/Counter Pins

Note:

When "pull-up resistor available" is selected in the pull-up setting register, the pin state in the stop

mode (SPL = 1) becomes high (pull-up state), not Hi-Z. During the reset, however, pull-up becomes

ineffective and the pin state becomes Hi-Z.

DDR

P-ch

N-ch

EC

PDR

INT10

PUL

P

3

4/TO/INT10

P

33

/EC

P

33

/EC

P

3

4/TO/INT10

Extern

a

l interr

u

pt

a

llowed

Inter

n

a

l d

a

t

a

bu

s

PDR re

a

d

Re

s

o

u

rce inp

u

t

S

top mode

(

S

PL = 1)

Re

s

o

u

rce

o

u

tp

u

t

en

ab

le

Re

s

o

u

rce o

u

tp

u

t

a

v

a

il

ab

le

P

u

ll-

u

p re

s

i

s

tor

PDR re

a

d

(At re

a

d-modify-write)

O

u

tp

u

t

l

a

tch

PDR write

Pin

DDR write

PUL re

a

d

PUL write

S

top mode

(

S

PL = 1)

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