Block diagram of the uart-relating pins – FUJITSU F2MC-8L F202RA User Manual
Page 304

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CHAPTER 13 UART
■
Block Diagram of the UART-relating Pins
Figure 13.3-1 Block Diagram of UART-relating Pins
When use of the pull-up resistor is selected in the pull-up setting register, the pin status does not become
Hi-Z but "H" level (pull-up state) in stop mode (SPL = 1). However, the pull-up resistor is not applied
during reset; accordingly, the pin status becomes Hi-Z.
DDR
Pch
Nch
UCK
PDR
PUL
P
3
0/UCK/
S
CK
P
3
2/UI/
S
I
UI
P
3
0/UCK/
S
CK
P
3
1/UO/
S
O
Pin
P
3
2/UI/
S
I
Inter
n
a
l d
a
t
a
bu
s
PDR re
a
d
PDR re
a
d
(At re
a
d-modify-write)
PDR write
DDR write
PUL re
a
d
PUL write
Re
s
o
u
rce o
u
tp
u
t
Re
s
o
u
rce
o
u
tp
u
t
en
ab
le
S
top mode
(
S
PL = 1)
Re
s
o
u
rce
o
u
tp
u
t
a
llowed
P
u
ll-
u
p re
s
i
s
tor
O
u
tp
u
t
l
a
tch
S
top mode
(
S
PL = 1)
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