FUJITSU F2MC-8L F202RA - Manual (Page 146)

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CHAPTER 6 WATCHDOG TIMER
6.3 Watchdog Control Register (WDTC)
The watchdog control register (WDTC) activates and clears the watchdog timer.
■ Watchdog Control Register (WDTC)
Figure 6.3-1 Watchdog Control Register (WDTC)
WTE 3 WTE2 WTE1 WTE0
0 1 0 1
RE S V
0
b it7 b it6 b it5 b it4 b it 3 b it2 b it1 b it0
0009
H RE S V WTE 3 WTE2 WTE1 WTE0 0---XXXX
B
R/W R/W R/W R/W R/W
Addre ss
Initi a l v a l u e
W a tchdog control b it
S t a rt s the w a tchdog timer
( u pon fir s t writing a fter re s et)
Cle a r s the w a tchdog timer
( u pon s econd or subs e qu ent writing a fter a
re s et)
Other th a n ab ove No oper a tion
Re s erved b it
Write "0" to thi s b it.
: Un us ed
R/W : Re a d ab le/writ ab le
X : Undefined
Table 6.3-1 Explanation of Functions of Each Bit in Watchdog Control Register (WDTC)
Bit name Description
bit7 RESV: Reserved bit • Write "0" to this bit.
bit6
to
bit4
Unused bits
• Undefined when it is read.
• Writing values does not affect operation.
bit3
to
bit0
WTE3, WTE2,
WTE1, WTE0:
Watchdog control bits
• Writing "0101
B
" activates (for first writing) or clears (for second
or subsequent writing) the watchdog timer.
• Writing other than "0101
B
" does not affect operation.
Note:
These bits indicate "1111
B
" when read. Bit manipulation
instructions cannot be used.