FUJITSU F2MC-8L F202RA - Manual (Page 431)

415
INDEX
When Bidirectional Serial I/O Operation is Performed
.......................................................... 334
Serial Input
Operation at Serial Input Completion ................. 328
Program Example for 8-bit Serial Input .............. 337
Serial Input Operation ...................................... 327
Serial Input Data Register
Serial Input Data Register (SIDR) ...................... 297
Serial Mode Control Register
Serial Mode Control Register (SMC) ................. 290
Serial Mode Register
Serial Mode Register (SMR) ............................. 320
Serial Output
Operation at Serial Output Completion ............... 326
Program Example for 8-bit Serial Output ........... 336
Serial Output Operation .................................... 325
Serial Output Data Register
Serial Output Data Register (SODR) .................. 298
Serial Rate Control Register
Serial Rate Control Register (SRC) .................... 292
Serial Status and Data Register
Serial Status and Data Register (SSD) ................ 294
Serial Switch
Serial Switch ................................................... 281
Serial Switch Register
Serial Switch Register (SSEL) ........................... 301
Setting
Setting the Read/Reset State .............................. 368
SIDR
Serial Input Data Register (SIDR) ...................... 297
Single-chip Mode
Single-chip Mode ............................................... 72
Sleep Mode
Operations Related to Sleep Mode ....................... 64
SMC
Serial Mode Control Register (SMC) ................. 290
SMR
Serial Mode Register (SMR) ............................. 320
SODR
Serial Output Data Register (SODR) .................. 298
Software Reset
Software Reset,Watchdog Timer Reset .............. 373
Special Instructions
Special Instructions .......................................... 387
Square Wave
Interval Timer Functions (Functions to Output
the Square Wave) ............................... 136
SRC
Serial Rate Control Register (SRC) .................... 292
SSD
Serial Status and Data Register (SSD) ................ 294
SSEL
Serial Switch Register (SSEL) ........................... 301
Stabilization of Oscillation
State of Reset Waiting for Stabilization of Oscillation
............................................................49
Stack
16-bit Data Storage State in Stack ........................26
Stack Area
Stack Area for Interrupt Processing ......................42
Stack Operation
Stack Operation at the Beginning of Interrupt
Processing .............................................41
Stack Operation at the End of Interrupt Processing
............................................................41
Standby Control Register
Standby Control Register (STBC) ........................66
Standby Mode
Cancellation of Standby Mode by an Interrupt
............................................................70
Diagram for State Transition in Standby Mode
............................................................68
Notes on Setting Standby Mode ...........................70
Operation in Standby Mode and at Halfway Stop
..........................................................197
Operations in Standby Mode ................................63
Operations in the Standby Mode and at a Suspension
..........................................................152
Standby Mode ....................................................62
Transition to Standby Mode and Interrupt .............70
State
State of Reset Waiting for Stabilization of Oscillation
............................................................49
States of Pins after the CPU Reads the Mode Data
............................................................50
States of Pins during Reset ..................................50
STBC
Standby Control Register (STBC) ........................66
Steps
Steps in the Interrupt Operation ............................37
Stop Mode
Operations Related to Stop Mode .........................65
Structure
Structure of Port 0 ..............................................78
Structure of Port 3 ..............................................84
Structure of Port 4 ..............................................90
Structure of Port 5 ..............................................94
Structure of Port 6 ............................................100
Structure of Port 7 ............................................107
Suspension
Operations in the Standby Mode and at a Suspension
..........................................................152
SYCC
Configuration of the System Clock Control Register
(SYCC) ................................................56
System Clock Control Register
Configuration of the System Clock Control Register
(SYCC) ................................................56