FUJITSU F2MC-8L F202RA - Manual (Page 209)

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CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
8.8 Functions of Operations of Capture Functions
This section describes the capture function operation of the 8/16-bit capture timer/
counter.
■ Capture Function Operation
●
8-bit mode
To operate the capture function in the 8-bit mode, the function must be set as shown in Figure 8.8-1 .
Figure 8.8-1 Setting of Capture Function in 8-bit Mode
The 8-bit capture mode is allowed by the capture mode enable/edge detection selection bits (EDGS1 and
EDGS0) of the capture control register (TCCR). "1" is written to the timer start bit (TSTR0) after the clock
source selection bits (TCS02, TCS01, and TCS00) of the timer 0 control register (TCR0) have been set.
In the capture mode, the count value is captured to the capture data register (TCPL) each time a capture
input edge is detected and the capture edge detection flag (CPIF) is set to "1". In this case, if the capture
interrupt enable bit (CPIEN) is already set to "1", an interrupt request is output to the CPU.
The capture mode is divided into free-run mode and clear mode.
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
DDR3
0
TCCR CPIF CFCLR CPIEN CCMSK TCMSK EDGS1 EDGS0 RESV
TCR1 TIF1 TFCR1 T1IEN TCS12 TCS11 TCS10 TSTR1
TCR0 TIF0 TFCR0 T0IEN CINV TCS02 TCS01 TCS00 TSTR0
TCR2 PEN TSEL
TCPL
: Used bit
: Unused bit
0 : Set "0"
Setting of a value
other than 00
Setting of a value other
than 111
Setting of a value other
than 111
Number of detected events