FUJITSU F2MC-8L F202RA - Manual (Page 59)

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CHAPTER 3 CPU
3.5 Reset
There are four sources of reset:
• External reset
• Software reset
• Watchdog reset
• Power-on reset
Oscillation stabilization wait time is not applied in some operating modes when a reset
occurs or in some option settings.
■ Reset Sources
● External reset
External reset occurs when "L" level is input to the external reset pin (RST). When the reset pin becomes
"H" level, the external reset is cancelled.
For external reset when power is turned on or in stop mode, the reset operation is performed after
oscillation stabilization wait time is up or the external reset is cancelled.
The external reset pin functions as the reset output pin in accordance with option settings.
●
Software reset
Software reset generates a 4-instruction cycle reset by writing "0" into the software reset bit in the standby
control register (STBC: RST). Software reset does not wait until oscillation stabilization wait time has
expired.
●
Watchdog reset
Watchdog reset generates a 4-instruction cycle reset when no data is written into the watchdog control
register (WDTC) within a specified time after the watchdog timer is activated. Watchdog reset does not
wait until oscillation stabilization wait time is up.
Table 3.5-1 Reset Sources
Reset source Reset condition
External reset The external reset pin is "L" level.
Software reset
"0" is written into the software reset bit in the standby control register (STBC:
RST).
Watchdog reset The watchdog timer overflows.
Power-on reset Power is turned on.