FUJITSU F2MC-8L F202RA - Manual (Page 71)

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CHAPTER 3 CPU
●
Oscillator
Oscillation circuit that halts oscillation in stop mode.
● System clock selector
Selects one of four frequency-divided source clocks to be supplied to the clock control circuit.
●
Clock controller
Controls the operating clock supplied to the CPU and peripheral circuits according to the active (RUN)
mode and standby mode (sleep, stop).
It also stops supply of the clock to the CPU until the clock supply stop signal for the oscillation
stabilization wait time selector is cancelled.
●
Oscillation stabilization wait time selector
Selects one of three oscillation stabilization wait time periods generated by the time-base timer according to
the standby mode or a reset, then outputs the clock supply stop signal to the CPU by using the selected time
period.
● System clock control register (SYCC)
Selects the clock speed and oscillation stabilization wait time setting, then checks the clock state.
●
Standby control register (STBC)
Controls transition from active (RUN) mode to standby mode, pin state settings at stop mode, and software
reset.