FUJITSU F2MC-8L F202RA - Manual (Page 430)

414
INDEX
Register and Vector Table Related to 8/16-bit Capture
Timer/Counter of Interrupts .................. 184
Register and Vector Table Related to Interrupts from
Time-base Timer ................................. 121
Register and Vector Table Related to the Interrupt of
the A/D Converter ............................... 272
Register and Vector Table Related to the Interrupts of
an 8-bit PWM Timer ............................ 147
Register Associated with Interrupt Generation by
External Interrupt Circuit 1 and Vector Table
.......................................................... 238
Register Associated with Interrupt Generation by
External Interrupt Circuit 2 and Vector
Table
.................................................. 253
Registers Associated with 12-bit PPG Timer
.......................................................... 213
Registers Associated with External Interrupt Circuit 1
.......................................................... 231
Registers Associated with External Interrupt Circuit 2
.......................................................... 249
Registers of 8/16-bit Capture Timer/Counter
.......................................................... 170
Registers of 8-bit Serial I/O ............................... 319
Registers of Port 4 .............................................. 91
Registers of Port 5 .............................................. 95
Registers PDR0, DDR0, and PUL0 of Port 0 ......... 79
Registers PDR3, DDR3, and PUL3 of Port 3 ......... 85
Registers PDR6, DDR6, and PUL6 of Port 6 ....... 102
Registers PDR7, DDR7, and PUL7 of Port 7 ....... 108
Registers Related to the 8-bit PWM Timer .......... 142
Registers Related to the A/D Converter .............. 265
Registers Related to the Wild Register Function
.......................................................... 350
Serial Data Register (SDR) ................................ 323
Serial Input Data Register (SIDR) ...................... 297
Serial Mode Control Register (SMC) ................. 290
Serial Mode Register (SMR) ............................. 320
Serial Output Data Register (SODR) .................. 298
Serial Rate Control Register (SRC) .................... 292
Serial Status and Data Register (SSD) ................ 294
Serial Switch Register (SSEL) ........................... 301
Standby Control Register (STBC) ........................ 66
Time-base Timer Control Register (TBTC) ......... 119
Timer 0 Control Register (TCR0) ...................... 173
Timer 0 Data Register (TDR0) .......................... 178
Timer 1 Control Register (TCR1) ...................... 175
Timer 1 Data Register (TDR1) .......................... 180
Timer Output Control Register (TCR2) .............. 177
UART Interrupt Related Registers and Vector Table
Addresses ........................................... 303
UART-relating Registers ................................... 289
Watchdog Control Register (WDTC) ................. 130
Wild Register Addresses List ............................. 356
Wild Register Applicable Addresses .................. 348
Wild Register Function ..................................... 348
Register Bank Pointer
Configuration of the Register Bank Pointer (RP)
........................................................... 31
Reset
Block Diagram of External Reset Pin ................... 47
Function of the External Reset Pin ....................... 47
Influence from a Reset of Contents in RAM ......... 49
Input of a Hardware Reset (RST) ....................... 373
Overview of the Reset Operation ......................... 48
Setting the Read/Reset State .............................. 368
Software Reset,Watchdog Timer Reset .............. 373
State of Reset Waiting for Stabilization of Oscillation
........................................................... 49
States of Pins during Reset .................................. 50
Reset Flag Register
Configuration of the Reset Flag Register (RSFR)
........................................................... 45
Reset Sources
Reset Sources .................................................... 43
Reset Sources and Oscillation Stabilization Wait
Time .................................................... 44
Reset Waiting
State of Reset Waiting for Stabilization of Oscillation
........................................................... 49
RP
Configuration of the Register Bank Pointer (RP)
........................................................... 31
RSFR
Configuration of the Reset Flag Register (RSFR)
........................................................... 45
RST
Input of a Hardware Reset (RST) ....................... 373
RST pin
High voltage supply on RST pin
(applicable to MB89F202RA only)
......................................................... 358
S
SDR
Serial Data Register (SDR) ............................... 323
Serial Data Register
Serial Data Register (SDR) ............................... 323
Serial Function Switching
Serial Function Switching ................................. 314
Serial I/O
8-bit Serial I/O Interrupt Register and Vector Table
......................................................... 324
Block Diagram for 8-bit Serial I/O Pins ............. 318
Block Diagram of 8-bit Serial I/O ...................... 315
Interrupt at Serial I/O Operation ........................ 324
Notes on Using 8-bit Serial I/O ......................... 333
Pins of 8-bit Serial I/O ...................................... 317
Registers of 8-bit Serial I/O .............................. 319
Serial I/O Function ........................................... 314