FUJITSU F2MC-8L F202RA - Manual (Page 236)

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CHAPTER 9 12-BIT PPG TIMER
Figure 9.5-2 illustrates the operation of the 12-bit PPG timer.
Figure 9.5-2 Operation of 12-bit PPG Timer
(RCR2 3 , 24: S CL0 to S CL11)
(RCR21, 22:H S C0 to H S C11)
"000 H "
Co u nt b y co u nter
Cycle period s etting
"H" width s etting
Cycle period (*1)
"H" width (*2)
PPG o u tp u t p u l s e w a veform
*1: If intern a l co u nt clock cycle period i s 2, 4, 16, or 256 t IN S T , cycle period = comp a re v a l u e for cycle
period m u ltiplied b y the co u nt clock cycle period.
*2: If intern a l co u nt clock cycle period i s 2, 4, 16, or 256 t
IN S T
, "H" width = comp a re v a l u e for the "H"
width m u ltiplied b y the co u nt clock cycle period.