FUJITSU F2MC-8L F202RA - Manual (Page 271)

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CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 (LEVEL)
Figure 11.6-2 Operation of External Interrupt 2 (INT20)
Note:
Even when the pin is used as an external interrupt input pin, the pin state can be read directly from the
port 0 data register (PDR0).
RETI RETI
PDR0:bit0
Pulse waveform input
to INT20/AN4 pin
(Detection of the "L" level)
External interrupt input enabled state
Clear the bit within interrupt
processing routine.
(IRQA state also
changes accordingly.)
EIE2:IE20
EIF2:IF20
Interrupt processing Interrupt processing
Operation of interrupt
processing routine for
IRQA
Can be read at any time.