FUJITSU F2MC-8L F202RA - Manual (Page 200)

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CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
Notes:
• When the counter value matches the TDR0 value and at the same time the counter stops (TCR0:
TSTR0 = 0), the TIF0 bit is not set.
If the T0IEN bit is set to "1" (enable) when the TIF0 bit is "1", an interrupt request is generated
immediately.
• If the compare register value is 0000
H
or 00
H
, the 8/16-bit capture timer/counter cannot generate an
interrupt. Therefore, when using interrupts, set a value greater than or equal to 0001
H
or 01
H
. The 8/
16-bit capture timer/counter also cannot generate an interrupt if the counter function detects the
0000
H
or 00
H
width.
■ Register and Vector Table Related to 8/16-bit Capture Timer/Counter of Interrupts
For interrupt operation, see Section "3.4.2 Steps in the Interrupt Operation ".
Table 8.5-2 Register and Vector Table Related to 8/16-bit Capture Timer/counter of Interrupts
Interrupt
name
Interrupt level setting register Vector table address
Register Setting bit Higher Lower
Timer/counter
function
IRQ3 ILR1 (007B
H
) L31 (bit7) L30 (bit6) FFF4
H
FFF5
H
Capture function IRQ4 ILR2 (007C
H
) L41 (bit1) L40 (bit0) FFF2
H
FFF3
H