FUJITSU F2MC-8L F202RA - Manual (Page 256)

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CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 (EDGE)
Figure 10.6-2 shows the operation when an external interrupt is input to the INT10 pin.
Figure 10.6-2 Operation of External Interrupt 1 (INT10)
Note:
Even when the pin is used as an external interrupt input pin, the pin state can be read directly from the
port data register (PDR3).
Pulse waveform
input to INT10 pin
Cleared when EIE0 bit
is set
Cleared by
program
Interrupt request flag bit is
cleared by the program
EIR0 bit
EIE0 bit
SL01 bit
SL00 bit
IRQ0
Edge detection
OFF Rising edge Falling edge Both edges