FUJITSU F2MC-8L F202RA User Manual
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CHAPTER 13 UART
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UART interrupt sources
[Reception]
When data with the specified length is correctly received or when the overrun error or framing error
occurs while data is being received, the reception interrupt request (IRQ6) is generated if the reception
interrupt request is enabled (SSD: RIE = 1).
[Transmission]
When data to be transmitted is written into the SODR register, sent to the internal shift register, and the
next data then becomes writable, the transmission interrupt request (IRQ5) is generated if the
transmission interrupt request is allowed (SSD: TIE = 1).
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UART prescaler, baud rate generator, clock divider selection register
The clock input to the baud rate generator is changeable by switching the rate of division using the clock
divider selection registers.