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CHAPTER 17 FLASH MEMORY ..................................................................................... 357
17.1
Overview of Flash Memory ............................................................................................................. 358
17.2
Flash Memory Control Status Register (FMCS) ............................................................................. 359
17.3
Starting the Flash Memory Automatic Algorithm ............................................................................ 361
17.4
Confirming the Automatic Algorithm Execution State ..................................................................... 362
17.4.1
Data Polling Flag (DQ7) ............................................................................................................ 363
17.4.2
Toggle Bit Flag (DQ6) ................................................................................................................ 364
17.4.3
Timing Limit Exceeded Flag (DQ5) ........................................................................................... 365
17.4.4
Toggle Bit-2 Flag (DQ2) ............................................................................................................ 366
17.5
Detailed Explanation of Writing to Erasing Flash Memory .............................................................. 367
17.5.1
Setting The Read/Reset State ................................................................................................... 368
17.5.2
Writing Data ............................................................................................................................... 369
17.5.3
Erasing All Data (Erasing Chips) ............................................................................................... 371
17.6
Flash Security Feature .................................................................................................................... 372
17.7
Notes on using Flash Memory ........................................................................................................ 373
APPENDIX ......................................................................................................................... 375
APPENDIX A I/O Map ............................................................................................................................... 376
APPENDIX B Overview of the Instructions ................................................................................................ 380
B.1
Addressing ..................................................................................................................................... 383
B.2
Special Instructions ........................................................................................................................ 387
B.3
Bit Manipulation Instructions (SETB and CLRB) ............................................................................ 391
B.4
F
2
MC-8L Instructions List ............................................................................................................... 392
B.5
Instruction Map ............................................................................................................................... 399
APPENDIX C Mask Options ...................................................................................................................... 400
APPENDIX D Programming EPROM with Evaluation Chip ........................................................................ 401
APPENDIX E Pin State of the MB89202/F202RA Series .......................................................................... 402
INDEX................................................................................................................................... 403
