FUJITSU F2MC-8L F202RA - Manual (Page 429)

413
INDEX
Programming EPROM
Programming EPROM with Evaluation Chip
.......................................................... 401
Programming Example
External Interrupt Circuit 1 Programming Example
.......................................................... 241
Programming Examples for Time-base Timer
.......................................................... 125
Programming Examples of Watchdog Timer
.......................................................... 133
PUL
Registers of Port 5 .............................................. 95
Registers PDR0, DDR0, and PUL0 of Port 0 ........ 79
Registers PDR3, DDR3, and PUL3 of Port 3 ........ 85
Registers PDR6, DDR6, and PUL6 of Port 6 ...... 102
Registers PDR7, DDR7, and PUL7 of Port 7 ...... 108
PWM Compare Register
PWM Compare Register (COMR) ..................... 145
PWM Control Register
PWM Control Register (CNTR) ........................ 143
PWM Timer
Program Example of PWM Timer Functions
.......................................................... 159
PWM Timer Functions ..................................... 137
R
RAM
16-bit Data Storage State on RAM ....................... 26
Influence from a Reset of Contents in RAM ......... 49
RCR
12-bit PPG Control Register 1 (RCR21) ............. 214
12-bit PPG Control Register 2 (RCR22) ............. 215
12-bit PPG Control Register 3 (RCR23) ............. 216
12-bit PPG Control Register 4 (RCR24) ............. 218
Read
Setting the Read/Reset State .............................. 368
States of Pins after the CPU Reads the Mode Data
............................................................ 50
Read Destination
Read Destination at Execution of a Bit Manipulation
Instruction .......................................... 391
Read-modify-write
Read-modify-write Operation ............................ 391
Receiving Status
Receiving Status .............................................. 296
Reception
Reception Interrupt .......................................... 303
Reception Operations
Reception Operations
(Operating Mode 0,1,or 3) ................... 307
Reception Operations
(Operating Mode 2 Only) .................... 309
Register
12-bit PPG Control Register 1 (RCR21) ............. 214
12-bit PPG Control Register 2 (RCR22) .............215
12-bit PPG Control Register 3 (RCR23) .............216
12-bit PPG Control Register 4 (RCR24) .............218
8-bit Serial I/O Interrupt Register and Vector Table
..........................................................324
A/D Control Register 1 (ADC1) .........................266
A/D Control Register 2 (ADC2) .........................268
A/D Data Register (ADDH and ADDL) ..............270
A/D Enable Register (ADEN) ............................271
Address Comparison EN Register (WREN) ........354
Block Diagram of the Wild Register Function
..........................................................349
Buzzer Register (BZCR) ...................................343
Capture Control Register (TCCR) ......................171
Capture Data Registers H and L (TCPH and TCPL)
..........................................................182
Clock Divider Selection Register (UPC) .............299
Configuration of the Condition Code Register (CCR)
............................................................29
Configuration of the General-purpose Registers
............................................................32
Configuration of the Interrupt Level Setting Registers
(ILR1 to ILR4) ......................................36
Configuration of the Register Bank Pointer (RP)
............................................................31
Configuration of the Reset Flag Register (RSFR)
............................................................45
Configuration of the System Clock Control Register
(SYCC) ................................................56
Data Setting Register (WRDR) ..........................351
Dedicated Register Configuration .........................27
External Interrupt 2 Flag Register (EIF2) ............252
External Interrupt Circuit 2 Control Register (EIE2)
..........................................................250
External Interrupt Control Register 1 (EIC1)
..........................................................232
External Interrupt Control Register 2 (EIC2)
..........................................................235
Features of the General-purpose Registers .............33
Flash Memory Control Status Register (FMCS)
..........................................................359
Flash Memory Register .....................................358
Functions of Port 0 Registers ...............................80
Functions of Port 3 Registers ...............................86
Functions of Port 5 Registers ...............................96
Functions of Port 6 Registers .............................103
Functions of Port 7 Registers .............................109
Functions of the Dedicated Register .....................27
General-purpose Register Area
(Address: 0100
H
to 01FF
H
) .....................24
Higher Address Set Register (WRARH) .............352
Lower Address Set Register (WRARL) ..............353
Operation Order of the Wild Register Function
..........................................................356
PWM Compare Register (COMR) ......................145
PWM Control Register (CNTR) .........................143