FUJITSU F2MC-8L F202RA - Manual (Page 210)

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CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
●
Free-run mode
Setting the clear mask bits (CCMSK and TCMSK) of TCCR to 11
B
enables the capture function to operate
as the free-run timer.
● Clear mode
Setting the clear mask bits (CCMSK and TCMSK) of TCCR to a value other than 11
B
enables the capture
function to operate as a clear mode.
The clear mode enables the measurement of signal pulse widths and cycles. In this case, using the clear
mode with the compare match detection function also enables the determination of signal availability.
Note:
The capture input pin also serves as the external clock input pin. The external clock mode cannot be
used in the capture mode.
Table 8.8-1 shows the relationship between the counter mode and the compare latch operation according to
the clear mask bit value.
Table 8.8-1 Relationship between Counter Mode and Compare Latch Operation
CCMSK TCMSK Counter mode
Data load to compare latch and counter clear
(provided/not provided)
At capture edge detection At compare match
Data load Counter clear Data load Counter clear
0 0
Clear mode
Provided Provided Provided Provided
0 1 Provided Provided Not provided Not provided
1 0 Not provided Not provided Provided Provided
1 1 Free-run mode Not provided Not provided Not provided Not provided