Avago Technologies LSI53C895A - Manual (Page 98)

3-10 Signal Descriptions
3.3.7 SCSI GPIO Signals
Table 3.8 describes the SCSI GPIO signals.
Table 3.8 SCSI GPIO Signals
Name PQFP BGA Pos Type Strength Description
GPIO0_
FETCH/ 61 T19 I/O 8 mA SCSI General Purpose I/O pin.
Optionally, when driven LOW, indicates
that the next bus request will be for an
opcode fetch. This pin is
programmable at power-up through the
MAD7 pin to serve as the data signal
for the serial EEPROM interface. This
signal can also be programmed to be
driven LOW when the LSI53C895A is
active on the SCSI bus.
GPIO1_
MASTER/ 63 R18 I/O 8 mA SCSI General Purpose I/O pin.
Optionally, when driven LOW, indicates
that the LSI53C895A is bus master.
This pin is programmable at power-up
through the MAD7 pin to serve as the
clock signal for the serial EEPROM
interface.
GPIO2 65 R20 I/O 8 mA SCSI General Purpose I/O pin. This
pin powers up as an input.
GPIO3 66 P18 I/O 8 mA SCSI General Purpose I/O pin. This
pin powers up as an input.
GPIO4 67 P19 I/O 8 mA SCSI General Purpose I/O pin.
GPIO4 powers up as an output. (This
pin may be used as the enable line for
VPP, the 12 V power supply to the
external flash memory interface.)
GPIO5 52 W19 I/O 8 mA SCSI General Purpose I/O pin. This
pin powers up as an input.
GPIO6 54 W20 I/O 8 mA SCSI General Purpose I/O pin. This
pin powers up as an input.
GPIO7 55 V19 I/O 8 mA SCSI General Purpose I/O pin. This
pin powers up as an input.
GPIO8 205 W2 I/O 8 mA SCSI General Purpose I/O pin. This
pin powers up as an input.