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Avago Technologies LSI53C895A User Manual

Page 231

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Block Move Instruction

5-9

These instructions perform the following steps:

1.

The LSI53C895A verifies that it is connected to the SCSI
bus as a Target before executing this instruction.

2.

The LSI53C895A asserts the SCSI phase signals (SMSG/,
SC_D/, and SI_O/) as defined by the Phase Field bits in the
instruction.

3.

If the instruction is for the command phase, the
LSI53C895A receives the first command byte and decodes
its SCSI Group Code.

If the SCSI Group Code is either Group 0, Group 1,
Group 2, or Group 5, and if the Vendor Unique
Enhancement 1 (VUE1) bit (SCNTL2 bit 1) is clear, then
the LSI53C895A overwrites the

DMA Byte Counter

(DBC)

register with the length of the Command

Descriptor Block: 6, 10, or 12 bytes.

If the Vendor Unique Enhancement 1 (VUE1) bit
(SCNTL2 bit 1) is set, the LSI53C895A receives the
number of bytes in the byte count regardless of the
group code.

If the Vendor Unique Enhancement 1 bit is clear and
group code is vendor unique, the LSI53C895A receives
the number of bytes in the count.

If any other Group Code is received, the

DMA Byte

Counter (DBC)

register is not modified and the

LSI53C895A requests the number of bytes specified in
the

DMA Byte Counter (DBC)

register. If the DBC

register contains 0x000000, an illegal instruction
interrupt is generated.

4.

The LSI53C895A transfers the number of bytes specified in
the DBC register starting at the address specified in the

DMA Next Address (DNAD)

register. If the OpCode bit is

set and a data transfer ends on an odd byte boundary, the
LSI53C895A stores the last byte in the

SCSI Wide Residue