Avago Technologies LSI53C895A - Manual (Page 146)

4-38 Registers
This register also contains the state of the lower eight bits of the SCSI
data bus during the Selection phase if the COM bit in the
DMA Control
(DCNTL) register is clear.
If the COM bit is cleared, do not access this register using SCRIPTS
operations, as nondeterminate operations may occur. This includes
SCRIPTS Read/Write operations and conditional transfer control
instructions that initialize the SFBR register.
Register: 0x09
SCSI Output Control Latch (SOCL)
Read/Write
REQ Assert SCSI REQ/ Signal 7
ACK Assert SCSI ACK/ Signal 6
BSY Assert SCSI BSY/ Signal 5
SEL Assert SCSI SEL/ Signal 4
ATN Assert SCSI ATN/ Signal 3
MSG Assert SCSI MSG/ Signal 2
C_D Assert SCSI C_D/ Signal 1
I/O Assert SCSI I_O/ Signal 0
This register is used primarily for diagnostic testing or programmed I/O
operation. It is controlled by the SCRIPTS processor when executing
SCSI SCRIPTS. SOCL is used only when transferring data using
programmed I/O. Some bits are set (1) or cleared (0) when executing
SCSI SCRIPTS. Do not write to the register once the LSI53C895A starts
executing normal SCSI SCRIPTS.
7 6 5 4 3 2 1 0
REQ ACK BSY SEL ATN MSG C_D I/O
0 0 0 0 0 0 0 0