Avago Technologies LSI53C895A - Manual (Page 344)

B-2 External Memory Interface Diagram Examples
Figure B.2 64 Kbyte Interface with 150 ns Memory
LSI53C895A
27C512-15/
MOE/
OE
MCE/
CE
D0 8
MAD[7:0]
Bus
CK
Q0
8
A[7:0]
QE
6
A[15:8]
V
DD
MAS0/
MAS1/
Note: MAD 3, 1, 0 pulled LOW internally. MAD bus sense logic enabled for 64 Kbyte of fast memory (150 ns
devices @ 33 MHz).
HCT374
GPIO4
MWE/
VPP
Control
+ 12 V
VPP
WE
Optional - for Flash Memory only, not
required for EEPROMS.
28F512-15/
Socket
D[7:0]
MAD2 4.7 K
D7 Q7
D0
CK
Q0
QE
HCT374
D7 Q7