Avago Technologies LSI53C895A - Manual (Page 191)

SCSI Registers 4-83
Wide Residue message is received. It may also be an
overrun data byte. The power-up value of this register is
indeterminate.
Register: 0x46
Memory Access Control (MACNTL)
Read/Write
TYP Chip Type [7:4]
These bits identify the chip type for software purposes.
Note: These bits no longer identify an 8XX device. These bits
have been set to 0xF to indicate that the device should be
uniquely identified by setting the PCI Configuration Enable
bit in the
Chip Test Two (CTEST2) register and using the
PCI Revision ID and PCI Device ID which will be shadowed
in the
SCRIPTS Fetch Selector (SFS) register. Any devices
that contain the value 0xF in this register should use this
mechanism to uniquely identify the device.
DWR Data Write 3
This bit is used to define if a data write is considered to
be a local memory access.
DRD Data Read 2
This bit is used to define if a data read is considered to
be a local memory access.
PSCPT Pointer SCRIPTS 1
This bit is used to define if a pointer to a SCRIPTS
indirect or table indirect fetch is considered to be a local
memory access.
SCPTS SCRIPTS 0
This bit is used to define if a SCRIPTS fetch is
considered to be a local memory access.
7 4 3 2 1 0
TYP DWR DRD PSCPT SCPTS
1 1 1 1 0 0 0 0