Avago Technologies LSI53C895A - Manual (Page 115)

PCI Configuration Registers 4-7
Register: 0x08
Revision ID (Rev ID)
Read Only
RID Revision ID [7:0]
This register contains the current revision level of the
device.
Registers: 0x09–0x0B
Class Code
Read Only
CC Class Code [23:0]
This 24-bit register is used to identify the generic function
of the device. The upper byte of this register is a base
class code, the middle byte is a subclass code, and the
lower byte identifies a specific register level programming
interface. The value of this register is 0x010000, which
identifies a SCSI controller.
Register: 0x0C
Cache Line Size
Read/Write
CLS Cache Line Size [7:0]
This register specifies the system cache line size in units
of 32-bit words. The value in this register is used by the
device to determine whether to use Write and Invalidate
or Write commands for performing write cycles, and
7 0
RID
x x x x x x x x
23 0
CC
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7 0
CLS
0 0 0 0 0 0 0 0